ASIC Verification Engineer
4 days ago
Description:
What Candidate will Do:
• Craft and execute top-notch verification plans, ensuring every detail is covered.
• Design and refine cutting-edge verification environments for peak performance.
• Develop and maintain UVCs, leaving no design corner unverified.
• Lead both random and directed testing strategies to catch elusive bugs.
• Utilize advanced coverage techniques to achieve exceptional verification completeness.
• Drive continuous innovation, enhancing product quality, efficiency, and workflows.
Skills candidate shall bring
• Expertise in ASIC or FPGA verification at IP, sub-system, and chip levels, using SystemVerilog UVM. Possibly over 8 years of experience in Verification.
• Hands On experience designing UVM test environments and driving coverage closure
• An insatiable curiosity, ready to learn something new daily and apply it to make a real difference.
• Creative problem-solving skills—you see challenges as opportunities for innovation.
• Collaborative spirit and the ability to thrive independently, with exceptional communication skills.
• Results-oriented mindset with a passion for continuous improvement, always seeking more innovative, faster solutions.
• Master's degree in Electrical Engineering, Computer Engineering, or a related field.
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