ASIC Designer
14 hours ago
About the Role
Vipas AB is seeking a Senior ASIC Designer for a leading technology client in Stockholm. You will work end-to-end with ASIC/SoC development, taking ownership from architecture and RTL design through tape-out, while collaborating closely with cross-functional teams.
Key Responsibilities & Skills
Ownership of ASIC projects from specification to tape-out and bring-up
Define and document chip-level and system architectures
Expert RTL design using Verilog/SystemVerilog
Strong understanding of microarchitecture, clocking, resets, power domains, FSMs, pipelining
Collaboration on verification using SystemVerilog/UVM and simulators (VCS, Questa, ModelSim)
Hands-on experience with synthesis, timing constraints, and timing closure
Guide physical design teams on floorplanning and timing paths
Knowledge of low-power design (UPF/CPF, clock gating, DVFS) and DFT concepts
Why Vipas AB?
At Vipas AB, we see our consultants as partners – not just resources.
We offer:
Assignments aligned with your skills and professional development
Close and personal dialogue throughout the assignment
Transparency regarding assignment scope, expectations, and conditions
Opportunities to work in technically advanced and innovative environments
A company that values trust, responsibility, and long-term collaboration
Interested?
Submit your application or contact Vipas AB for more information.
Apply today:
Send your application to or contact us
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