UVM Verification Engineer
2 weeks ago
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[CONTRACT] UVM Verification Engineer, SolnaClient: microTECH Global Ltd
Location: Solna, Sweden
Job Category: Other
EU work permit required: Yes
Job Reference: 5a91362e1302
Job Views: 3
Posted: 02.04.2025
Expiry Date: 17.05.2025
Job Description:Job: Verification Engineer – UVM
Location: Sweden/Remote
Duration: End of year minimum
Start Date: ASAP
A client based in Sweden is looking for a UVM Verification Engineer for an initial 6-12 month contract with extensions. The role can be performed remotely.
The successful Verification Engineer will be joining a newly formed team within our client's offices and will help to expand on projects being worked on, both new and existing within other teams. You will be involved in new and existing ASIC projects.
Skills:- Strong background in ASIC Verification
- System Verilog/UVM
- Knowledge of IP block level verification
- Multi-clock domains
- RTL within Verilog, VHDL and/or SystemVerilog
- Experience working with complex ASIC and/or large FPGA designs
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