Design Verification Architect

11 hours ago


Stockholm, Stockholm, Sweden Capgemini Full time

Technology and Innovation

We are committed to driving innovation in telecommunications. As part of our ASIC IP team, you'll play a key role in shaping the future of 5G and 6G technology.

Key Responsibilities

  • Design and implement a thorough verification plan.
  • Architect and enhance state-of-the-art verification environments.
  • Build and maintain UVCs for comprehensive design verification.
  • Establish testbench infrastructure and create test cases using UVM-SV.
  • Apply random and directed testing methods.
  • Utilize advanced coverage techniques.
  • Execute functional verification using coverage-driven methodologies.
  • Make key architectural decisions for the testbench.
  • Advocate for improvements in product quality, efficiency, and workflow processes.

Requirements

  • Expertise in ASIC or FPGA verification with System Verilog UVM, potentially 15 years of experience.


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