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UVM Expert
3 days ago
Do you have experience as a Verification Engineer and are you interested in working on complex digital systems?
About the Position:
- We are partnering with a European company to find a skilled Verification Engineer for a 6-month contract position.
Main Responsibilities:
- Develop verification environments for complex SoCs using UVM and System Verilog
- Collaborate with colleagues to achieve project goals
- Analyze and debug complex system-level issues
- Maintain and improve verification environments
Requirements:
- Extensive experience with UVM and System Verilog
- Strong knowledge of complex SOC design principles
- Ability to work independently and as part of a team
- Excellent problem-solving skills
Working Arrangements:
- Remote working available
- Opportunity to work with a talented team
- Competitive salary and benefits package
Please note that applicants should be aware of any necessary work permit requirements.
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