Sr ASIC

3 weeks ago

Stockholms kommun, Sweden Capgemini Full time

We are seeking Senior ASIC & FPGA Developers to join our team. As a developer, you will contribute to cutting-edge projects in the semiconductor industry. Whether you specialize in Design, Verification, or both, we encourage you to apply

Employment Type: We are hiring for both permanent and temporary positions. Join our innovative team and be part of exciting projects

Verification Role
  • Define test plans, verification strategies, and specifications for IP/Subsystem/SOC designs
  • Create testbench infrastructure and develop test cases and sequences using UVM-SV (System Verilog)
  • Implement and drive functional verification using coverage-driven methodologies
  • Make critical testbench architecture decisions based on design features


Design Role

  • Work on VLSI RTL logic design for IPs or subsystems
  • Develop high-performance and area-efficient digital designs for ASICs and FPGAs
  • Handle clock domain crossing (CDC), linting, and timing closure
  • Collaborate with backend teams to optimize design issues related to timing, power, and area
  • Proficiency in hardware description languages (VHDL, Verilog, System Verilog) is essential
  • Experience with Lab & Microsemi/Xilinx FPGAs are advantageous


Common Requirements

• Familiarity with industry-standard protocols (ARM-AMBA, Ethernet, PCIe, DDR, SATA, SERDES, CPRI, I2C, etc.).
• Strong teamwork skills and the ability to work independently.
• Be self-motivated and enthusiastic.

Nice-to-Have Skills
• Experience in C, Perl, Tcl, or Python.
• Proficiency in GIT and Gerrit flow.
• Knowledge of Formal Verification and Validation.
• Experience working on different levels of ASIC Verification (IP/Subsystem/SOC Design).
• Familiarity with MATLAB and other EDA tools is plus like Xcelium, VCS, Libero and Vivado.

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